- RAM for storing data and instructions
- Multiple processors, each connected to the RAM, each with a multiplier, an arithmetic unit, an arithmetic logic unit, and a bit manipulation unit, all of these units coupled so that output from one can be used as input for the next.
The processors can work in parallel. They can
- read instructions and data from RAM
- execute the instructions to process the data
- output the results
"
That's it (unless I missed something, but I don't think so). That is not very narrow. On the contrary: it describes pretty much any multi-processor system. It certainly doesn't describe a particular implementation technique.
If I didn't know better, I could easily mistake that for a description of the Cell microarchitecture[0]
"...that combines a general-purpose PowerPC core of modest performance with streamlined coprocessing elements which greatly accelerate multimedia and vector processing applications, as well as many other forms of dedicated computation."
and
"To achieve the high performance needed for mathematically intensive tasks, such as decoding/encoding MPEG streams, generating or transforming three-dimensional data, or undertaking Fourier analysis of data, the Cell processor marries the SPEs and the PPE via EIB to give access, via fully cache coherent DMA (direct memory access), to both main memory and to other external data storage"
There is only one claim, and the whole claim is a bit more specific that that. This prompts a couple of questions for those who know more about these things than I do:
1) When a claim consists of a conjunction of clauses, must an allegedly infringing device match all the clauses in order for it to be infringing that claim, or can each clause be infringed independently of whether the others are? At first sight, the latter seems unworkable, as an effective way to specify something is to say "it is a sort of X, except that..."
2) One of those clauses specifies "A plurality of media processing units, each media processing unit having an input/output coupled to at least one of the addressable memory input/outputs and comprising:..." (four short paragraphs follow, each describing, in general terms, some aspect of these units.) For the purposes of determining infringement of this patent, would any component matching these four paragraphs be considered a media processing unit?
Regarding (1), yes, it must match all. Because of this, patents usually enumerate variants as separate claims. E.g., the 1st claim will be something very broad. The 2nd claim will be, "claim 1, with feature X" [1]. The 3rd claim, "claim 1, with feature Y". The 4th claim, "claim 2, with feature X". etc. This (a) allows the inventor to claim each aspect of their invention separately; (b) since claims are invalidated independently, allows the inventor to still claim the very specific combination of all parts of their invention, if the broader claims are invalidated; and (c) allows the inventor to claim refinements of the invention which might otherwise be considered novel and therefore patentable by someone else.
This patent is odd in that it doesn't follow that pattern. Just one solitary claim.
(For reference, a random unrelated patent I happen to be reading now uses 26 claims to basically say "we invented a slightly different way to lay out RAID-6 parity blocks".)
[1] The specific verbiage used is usually something like "the system/method of claim N, further comprising [additional mechanism]", or "the system/method of claim N, wherein [specific design choice]".
"A data processing device with these components:
- RAM for storing data and instructions - Multiple processors, each connected to the RAM, each with a multiplier, an arithmetic unit, an arithmetic logic unit, and a bit manipulation unit, all of these units coupled so that output from one can be used as input for the next.
The processors can work in parallel. They can - read instructions and data from RAM - execute the instructions to process the data - output the results "
That's it (unless I missed something, but I don't think so). That is not very narrow. On the contrary: it describes pretty much any multi-processor system. It certainly doesn't describe a particular implementation technique.